Employing step and flash imprint lithography for gate level patterning of a MOSFET device

被引:8
作者
Smith, BJ [1 ]
Stacey, NA [1 ]
Donnelly, JP [1 ]
Onsongo, DM [1 ]
Bailey, TC [1 ]
Mackay, CJ [1 ]
Resnick, DJ [1 ]
Dauksher, WJ [1 ]
Mancini, D [1 ]
Nordquist, KJ [1 ]
Sreenivasan, SV [1 ]
Banerjee, SK [1 ]
Ekerdt, JG [1 ]
Willson, CG [1 ]
机构
[1] Univ Texas, Austin, TX 78712 USA
来源
EMERGING LITHOGRAPHIC TECHNOLOGIES VII, PTS 1 AND 2 | 2003年 / 5037卷
关键词
step and flash imprint lithography; alignment; planarization; etching; MOSFET;
D O I
10.1117/12.490142
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
Step and Flash Imprint Lithography (SFIL) is an alternative lithography technique that enables patterning of sub-100 nm features at a cost that has the potential to be substantially lower than either conventional projection lithography or proposed next generation lithography techniques. SFIL is a molding process that transfers the topography of a rigid transparent template using a low-viscosity, UV-curable organosilicon solution at room temperature and with minimal applied pressure.(1) Employing SFIL technology we have successfully patterned areas of high and low density, semi-dense and isolated lines down to 20 run,(2) and demonstrated the capability of layer-to-layer alignment.(3) We have also confirmed the use of SFIL to produce functional optical devices including a micropolarizer array consisting of orthogonal 100 nm titanium lines and spaces fabricated using a metal lift-off process.(4) This paper presents a demonstration of the SFIL technique for the patterning of the gate level in a functional MOSFET device.
引用
收藏
页码:1029 / 1034
页数:6
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