A bio-inspired two-layer mixed-signal flexible programmable chip for early vision

被引:22
作者
Galán, RC
Jiménez-Garrido, F
Domínguez-Castro, R
Espejo, S
Roska, T
Rekeczky, C
Petrás, I
Rodríguez-Vázquez, A
机构
[1] CSIC, CNM, Inst Microelect Sevilla, Seville 41012, Spain
[2] Hungarian Acad Sci, Inst Comp & Automat, Anal & Neural Comp Lab, H-1111 Budapest, Hungary
来源
IEEE TRANSACTIONS ON NEURAL NETWORKS | 2003年 / 14卷 / 05期
关键词
cellular neural networks; machine vision; neural networks hardware; visual systems;
D O I
10.1109/TNN.2003.816377
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A bio-inspired model for an analog programmable array processor (APAP), based on studies on the vertebrate retina, has permitted the realization of complex programmable spatio-temporal dynamics in VLSI. This model mimics the way in which images are processed in the Visual pathway, what renders a feasible alternative for the implementation of early vision tasks in standard technologies. A prototype chip has been designed and fabricated in 0.5 mum. CMOS. It renders a computing power per silicon area and power consumption that is amongst the highest reported for a single chip. The details of the bio-inspired network model, the analog building block design challenges and trade-offs and some functional tests results are presented in this paper.
引用
收藏
页码:1313 / 1336
页数:24
相关论文
共 29 条
[1]  
ALIREZA M, 1999, VISION CHIPS
[2]   A qualitative model-framework for spatio-temporal effects in vertebrate retinas [J].
Bálya, D ;
Roska, B ;
Nemeth, E ;
Roska, T ;
Werblin, F .
PROCEEDINGS OF THE 2000 6TH IEEE INTERNATIONAL WORKSHOP ON CELLULAR NEURAL NETWORKS AND THEIR APPLICATIONS (CNNA 2000), 2000, :165-170
[3]   A retinomorphic chip with parallel pathways: Encoding INCREASING, ON, DECREASING, and OFF visual signals [J].
Boahen, K .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2002, 30 (02) :121-135
[4]  
CARMONA R, 2002, THESIS U SEVILLA
[5]  
Carver M, 1989, ANALOG VLSI NEURAL S
[6]   Four-quadrant one-transistor-synapse for high-density CNN implementations [J].
Dominguez-Castro, R ;
Rodriguez-Vazquez, A ;
Espejo, S ;
Carmona, R .
CNNA 98 - 1998 FIFTH IEEE INTERNATIONAL WORKSHOP ON CELLULAR NEURAL NETWORKS AND THEIR APPLICATIONS - PROCEEDINGS, 1998, :243-248
[7]  
Espejo S, 1996, INT J CIRC THEOR APP, V24, P341, DOI 10.1002/(SICI)1097-007X(199605/06)24:3<341::AID-CTA920>3.0.CO
[8]  
2-L
[9]   A pixel-parallel image processor using logic pitch-matched to dynamic memory [J].
Gealow, JC ;
Sodini, CG .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (06) :831-839
[10]   A PRECISE 4-QUADRANT MULTIPLIER WITH SUBNANOSECOND RESPONSE [J].
GILBERT, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1968, SC 3 (04) :365-&