Damascene copper electroplating for chip interconnections

被引:1105
作者
Andricacos, PC [1 ]
Uzoh, C
Dukovic, JO
Horkans, J
Deligianni, H
机构
[1] IBM Corp, Thomas J Watson Res Ctr, Div Res, Yorktown Heights, NY 10598 USA
[2] IBM Corp, E Fishkill Facil, Microelect Div, Hopewell Junction, NY 12533 USA
关键词
D O I
10.1147/rd.425.0567
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Damascene Cu electroplating for on-chip metallization, which we conceived and developed in the early 1990s, has been central to IBM's Cu chip interconnection technology. We review here the challenges of filling trenches and vias with Cu without creating a void or seam, and the discovery that electrodeposition can be engineered to give filling performance significantly better than that achievable with conformal step coverage. This attribute of superconformal deposition, which we call superfilling, and its relation to plating additives are discussed, and we present a numerical model that represents the shape-change behavior of this system.
引用
收藏
页码:567 / 574
页数:8
相关论文
共 18 条
  • [1] Andricacos P. C., 1998, INTERFACE, V7, P23
  • [2] ANDRICACOS PC, 1994, ADV ELEC SC, V3, P227
  • [3] ANDRICACOS PC, 1998, 193 M EL SOC SAN DIE
  • [4] CHOW MM, 1988, Patent No. 4789648
  • [5] ELECTROCHEMICAL FABRICATION OF MECHANICALLY ROBUST PBSN C4 INTERCONNECTIONS
    DATTA, M
    SHENOY, RV
    JOHNES, C
    ANDRICACOS, PC
    HORKANS, J
    DUKOVIC, JO
    ROMANKIW, LT
    ROEDER, J
    DELIGIANNI, H
    NYE, H
    AGARWALA, B
    TONG, HM
    TOTTA, P
    [J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1995, 142 (11) : 3779 - 3785
  • [6] SIMULATION OF LEVELING IN ELECTRODEPOSITION
    DUKOVIC, JO
    TOBIAS, CW
    [J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1990, 137 (12) : 3748 - 3755
  • [7] FEATURE-SCALE SIMULATION OF RESIST-PATTERNED ELECTRODEPOSITION
    DUKOVIC, JO
    [J]. IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1993, 37 (02) : 125 - 141
  • [8] Full copper wiring in a sub-0.25 μm CMOS ULSI technology
    Edelstein, D
    Heidenreich, J
    Goldblatt, R
    Cote, W
    Uzoh, C
    Lustig, N
    Roper, P
    McDevitt, T
    Motsiff, W
    Simon, A
    Dukovic, J
    Wachnik, R
    Rathore, H
    Schulz, R
    Su, L
    Luce, S
    Slattery, J
    [J]. INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST, 1997, : 773 - 776
  • [9] EDELSTEIN DC, 1995, IBM J RES DEV, V39, P3833
  • [10] EDELSTEIN DC, 1995, P 12 INT IEEE VLSI M, P301