Global (interconnect) warming

被引:137
作者
Banerjee, K [1 ]
Mehrotra, A
机构
[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA
[2] Univ So Calif, Dept Elect Engn, Los Angeles, CA 90089 USA
[3] Swiss Fed Inst Technol, Dept Elect Engn, CH-1015 Lausanne, Switzerland
[4] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61801 USA
[5] Univ Illinois, Illinois Ctr Integrated Microsyst Grp, Urbana, IL 61801 USA
来源
IEEE CIRCUITS & DEVICES | 2001年 / 17卷 / 05期
关键词
D O I
10.1109/101.960685
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An overview is given on a comprehensive analysis of the thermal effects in advanced high-performance interconnect systems arising due to self-heating under various circuit conditions, including electrostatic discharge (ESD). The impact of these thermal effects on the design (driver sizing) and optimization of the interconnect length between repeaters at the global-tier signal lines are highlighted. Furthermore, the reliability implications for minimum-sized vias in ultimately buffered signal nets are quantified.
引用
收藏
页码:16 / 32
页数:17
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