Embedded DRAM technology: opportunities and challenges

被引:28
作者
Iyer, SS [1 ]
Kalter, HL [1 ]
机构
[1] IBM Corp, Syst Scale Integrat Dept, Microelect Div, E Fishkill, NY 12524 USA
关键词
Buffer storage - Cost effectiveness - Dynamic random access storage - Embedded systems - Storage allocation (computer);
D O I
10.1109/6.755442
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Enlarging the dynamic random access memory (DRAM) system memory and caches appropriately has given justification to the decreasing DRAM and disk storage prices. The system performance tends to improve with the addition of large high performance memory close to the processor, where high performance means a fast intrinsic access time as well as high bandwidths. Producing embeddded DRAMs using a logic process will require some additions to the process flow where the process complexity is expected to increase by about 25 percent. Many manufacturers see embedded DRAM as a way to leverage their investment inspite of the additional manufacturing process.
引用
收藏
页码:56 / 64
页数:9
相关论文
共 5 条
[1]   Integration of trench DRAM into a high-performance 0.18 μm logic technology with copper BEOL [J].
Crowder, S ;
Hannon, R ;
Ho, H ;
Sinitsky, D ;
Wu, S ;
Winstel, K ;
Khan, B ;
Stiffler, SR ;
Iyer, SS .
INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, :1017-1020
[2]  
Dennard Robert H., 1968, U.S. Patent, Patent No. 3387286
[3]  
KOYANAGI M, 1978, IEDM, P348
[4]  
PRINCE B, 1991, SEMICONDUCTOR MEMORI
[5]   A parallel processing chip with embedded DRAM macros [J].
Sunaga, T ;
Miyatake, H ;
Kitamura, K ;
Kogge, PM ;
Retter, E .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (10) :1556-1559