A fully integrated SiGe receiver IC for 10-Gb/s data rate

被引:56
作者
Greshishchev, YM
Schvan, P
Showell, JL
Xu, ML
Ojha, JJ
Rogers, JE
机构
[1] Nortel Networks, Ottawa, ON K1Y 4H7, Canada
[2] Univ Toronto, Toronto, ON M5S 3G4, Canada
关键词
clock and data recovery (CDR); jitter generation; jitter tolerance; jitter transfer; phase detector; phase-lacked loop (PLL); SONET; VCO;
D O I
10.1109/4.890309
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A silicon germanium (SiGe) receiver IC is presented here which integrates most of the 10-Gb/s SONET receiver functions. The receiver combines an automatic gain control and clock and data recovery circuit (CDR) with a binary-type phase-locked loop, 1:8 demultiplexer, and a 2(7) - 1 pseudorandom bit sequence generator for self-testing. This work demonstrates a higher level of integration compared to other silicon designs as well as a CDR with SONET-compliant jitter characteristics. The receiver has a die size of 4.5 x 4.5 mm(2) and consumes 4.5 W from -5 V.
引用
收藏
页码:1949 / 1957
页数:9
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