Low-resistivity poly-metal gate electrode durable for high-temperature processing

被引:35
作者
Akasaka, Y
Suehiro, S
Nakajima, K
Nakasugi, T
Miyano, K
Kasai, K
Oyamatsu, H
Kinugawa, M
Takagi, MT
Agawa, K
Matsuoka, F
Kakumu, M
Suguro, K
机构
[1] TOSHIBA CO LTD,ULSI DEVICE ENGN LAB,KAWASAKI,KANAGAWA 210,JAPAN
[2] TOSHIBA CO LTD,RISC PROCESSOR ENGN DEPT,KAWASAKI,KANAGAWA 210,JAPAN
[3] TOSHIBA CO LTD,KITA KYUSYU WORKS,FUKUOKA,JAPAN
关键词
D O I
10.1109/16.543020
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new low-resistivity poly-metal gate structure, W/WSiN/poly-Si, is proposed, A uniform ultrathin (<1 nm) WSiN barrier layer was formed by annealing a W(100 nm)WNx(5 nm)/poly-Si structure. The W/WSiN/poly-Si structure was found to be thermally stable even after annealing at 800 degrees C. The sheet resistivity of the W(100 nm)/WNx(5 nm)/poly-Si(100 nm) structure is as low as 1.5 Omega/square and independent of line-width from 0.52 mu m to 0.12 mu m. The sheet resistivity of this layer structure is 40% lower than that of the W(100 nm)/TiN(5 nm)/poly-Si structure [2]. In addition, an equivalent circuit simulation showed that the measured contact resistivity of W and poly-Si in the W/WSiN/poly-Si system did not affect the gate RC delay time. Finally, a process integration of the poly-metal gate electrode is discussed. A SiN capped poly-metal structure was demonstrated.
引用
收藏
页码:1864 / 1869
页数:6
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