Contact resistance in nanocrystalline silicon thin-film transistors

Thin-film transistors (TFTs) of nanocrystalline silicon (nc-Si:H) made by plasma-enhanced chemical vapor deposition have higher electron and hole field-effect mobilities than their amorphous counterparts. However, as the intrinsic carrier mobilities are raised, the effective carrier mobilities easily can become limited by the source/drain contact resistance. To evaluate the contact resistance, the ne-Si:H TFTs are made with a range of channel lengths. The TFTs are fabricated in a staggered top-gate bottom source/drain geometry. Both the intrinsic and the n(+) - or P+-doped nc-Si:H source/drain layers are deposited at 80-MHz excitation frequency at a substrate temperature of 150 degrees C. Transmission electron microscopy of the TFT cross section indicates that crystallites of doped nc-Si:H nucleate on top of the Cr source/drain contacts. As the film thickness increases, the crystallites coalesce, and the leaf-shaped crystal grains extend through the doped layer to the channel i layer. The contact resistance is estimated by measuring I-DS for several channel lengths at fixed gate and drain voltages. The results show that the contact resistance depends on the gate voltage and that the source/drain current of these TFTs at V-DS = 10 V becomes limited by the contact resistance when the channel length is less than 10 mu m for n-channel and less than 25 mu m for p-channel.