3.21 ps ECL gate using InP/InGaAs DHBT technology

被引：7

作者：

Ishii, K ^{[1
]}

Nosaka, H ^{[1
]}

Ida, M ^{[1
]}

Kurishima, K ^{[1
]}

Shibata, T ^{[1
]}

机构：

[1] NTT Corp, Photon Labs, Atsugi, Kanagawa 2430198, Japan

来源：

ELECTRONICS LETTERS | 2003年 / 39卷 / 20期

关键词：

D O I：

10.1049/el:20030940

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new circuit configuration for an emitter-coupled logic (ECL) gate that can reduce propagation delay time has been demonstrated. Nineteen-stage ring oscillators were fabricated using InP/InGaAs double-heterojunction bipolar transistors (DHBTs) with cutoff frequency f(T) and maximum oscillation frequency f(max) of about 232 and 360 GHz, respectively, to evaluate the speed performance of the proposed ECL gate. The minimum propagation delay is 3.21 ps/gate. The proposed ECL gate is about 8% faster than the conventional ECL gate.

引用

页码：1434 / 1436

页数：3

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