Power and Energy Perspectives of Nonvolatile Memory Technologies

被引:66
作者
Derhacobian, Narbeh [1 ]
Hollmer, Shane C. [1 ]
Gilbert, Nad [2 ]
Kozicki, Michael N. [3 ]
机构
[1] Adesto Technol Corp, Sunnyvale, CA 94089 USA
[2] Desert Microtechnol Associates, Scottsdale, AZ 85260 USA
[3] Arizona State Univ, Tempe, AZ 85287 USA
关键词
Emerging memory; flash memory; nonvolatile memory; resistive random access memory; subthreshold CMOS; ultralow-energy CMOS; ultralow-power design;
D O I
10.1109/JPROC.2009.2035147
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
080906 [电磁信息功能材料与结构]; 082806 [农业信息与电气工程];
摘要
Discrete and embedded nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 25 years. In recent years, the proliferation of personal media devices such as multimedia-enabled cell phones, personal music players, and digital cameras has accelerated the adoption of silicon-based solid state storage cards in consumer markets. Despite the expanded use of nonvolatile memory technologies in a variety of integrated systems, little has changed with respect to the core technology and cells that hold the data when power has been turned off. Today, floating gate (FG) or oxide-nitride-oxide trapped charge (ONO) cell structures dominate as the core technology behind all NVM devices and embedded blocks. All of the nonvolatile memory devices in production today based on these technologies require high voltage in excess of 5-8 V to operate primarily due to the fundamental nature of core cells and the physics of charge storage mechanisms. These are huge over-voltage requirements considering that the transistors in the logic block require substantially lower voltages (e. g., sub65 nm logic CMOS operate at less than 1 V). Integrating such high-voltage operation in advanced logic processes such as 65 nm or below logic CMOS process is yet another challenge limiting the exploitation of NVM for low-power embedded applications. The high voltage requirement for operation of these core cells has put strains on the continued scaling of today's discrete and embedded NVM technologies. Furthermore, future ultralow-power and subthreshold CMOS applications such as energy starved electronics require operations at sub-500 mV which clearly set forth significant challenges in integrating today's NVM technologies as nonvolatile storage elements for such systems. Several emerging technologies are competing to become the building blocks of next-generation nonvolatile memory solutions. Each of these emerging technologies has unique characteristics in terms of physical scaling, voltage scaling, cost, performance, and power features which differ from today's FG and ONO based technologies. This paper reviews the fundamental characteristics of current nonvolatile memory technologies as well as several promising emerging technologies from energy and power perspectives and specifically discusses the suitability of each one for use in ultralow-power and subthreshold CMOS applications.
引用
收藏
页码:283 / 298
页数:16
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