High carrier density CeO2 dielectrics -: implications for MOS devices

被引:24
作者
Lappalainen, J
Kek, D
Tuller, HL
机构
[1] Univ Oulu, Microelect & Mat Phys Lab, FIN-90014 Oulu, Finland
[2] MIT, Dept Mat Sci & Engn, Crystal Phys & Electroceram Lab, Cambridge, MA 02139 USA
[3] Jozef Stefan Inst, SI-1000 Ljubljana, Slovenia
基金
芬兰科学院; 美国国家科学基金会;
关键词
capacitor; CeO2; electrical properties; films; microstructure;
D O I
10.1016/S0955-2219(03)00578-8
中图分类号
TQ174 [陶瓷工业]; TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Nanocrystalline CeO2 films of 75 nm thickness were deposited on n-type (100) silicon substrates using pulsed laser deposition (PLD) technique to form a gate dielectric in the Pt/Si/CeO2/Pt MOS capacitor. XRD and AFM were used for characterization of the film crystal structure and grain size. Electrical properties of the MOS structure were examined by capacitance voltage (C-V) and impedance spectroscopy measurements. Based on the impedance measurements and reported electron mobilities, we derive a rather high carrier density of the order of 6 x 10(17) cm(-3). Nevertheless, their overall high resistance enables the films to serve as dielectrics. In contrast to conventional MOS capacitors, we find an additional capacitive contribution under accumulation we attribute to the electron depletion in the CeO2 film. We present a model consistent with these results. (C) 2003 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1459 / 1462
页数:4
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