A 0.1-μm 1.8-V 256-Mb phase-change random access memory (PRAM) with 66-MHz synchronous burst-read operation

被引：86

作者：

Kang, Sangbeom ^{[1
]}

Cho, Woo Yeong

Cho, Beak-Hyung

Lee, Kwang-Jin

Lee, Chang-Soo

Oh, Hyung-Rok

Choi, Byung-Gil

Wang, Qi

Kim, Hye-Jin

Park, Mu-Hui

Ro, Yn Hwan

Kim, Suyeon

Ha, Choong-Duk

Kim, Ki-Sung

Kim, Young-Ran

Kim, Du-Eung

Kwak, Choong-Keun

Byun, Hyun-Geun

Jeong, Gitae

Jeong, Hongsik

Kim, Kinam

Shin, YunSueng

机构：

[1] Samsung Elect, Memory Div, ATD Team, Hwasung 445701, Gyeonggi Do, South Korea

[2] Samsung Elect, Memory Div, SRAM Team, Hwasung 445701, Gyeonggi Do, South Korea

[3] Samsung Elect, Memory Div, Technol Dev Team, Yongin 445701, Gyeonggi Do, South Korea

[4] Samsung Elect, Mem Div, DRAM PE Team, Hwasung 445701, Gyeonggi Do, South Korea

[5] Samsung Elect, Syst LSI Div, DDI Business Team, Yongin 449711, Gyeonggi Do, South Korea

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2007年 / 42卷 / 01期

关键词：

burst-read; charge pump; endurance; phase-change memory; phase-change random access memory (PRAM); reset; retention;

D O I：

10.1109/JSSC.2006.888349

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 256-Mb phase-change random access memory has been developed, featuring 66-MHz synchronous burst-read operation. Using a charge pump system, write performance was characterized at a low supply voltage of 1.8 V. Measured initial read access time and burst-read access time are 62 and 10 ns, respectively. The write throughput was 0.5 MB/s with internal x 2 write and can be increased to similar to 2.67 MB/s with x 16 write. Endurance and retention characteristics are measured to be 10(7) cycles and ten years at 99 degrees C.

引用

页码：210 / 218

页数：9

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