Poly-Si thin-film transistors on steel substrates

被引：36

作者：

Howell, RS ^{[1
]}

Stewart, M ^{[1
]}

Karnik, SV ^{[1
]}

Saha, SK ^{[1
]}

Hatalis, MK ^{[1
]}

机构：

[1] Lehigh Univ, Display Res Lab, Bethlehem, PA 18015 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2000年 / 21卷 / 02期

关键词：

flexible substrate; poly-Si thin-film transistors; roll-to-roll processing; steel foil substrate;

D O I：

10.1109/55.821670

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We report the successful fabrication of poly-Si thin-film transistors (TFT's) on stainless steel substrates. The TFT's were fabricated on a 500 mu m thick polished stainless steel substrate using furnace crystallized amorphous Si deposited by PECVD. These devices typically have threshold voltages of 8.6 V, linear effective mobilities of 6.2 cm(2)/V.s and subthreshold slopes of 0.93 decade/V. This work demonstrates the feasibility of poly-Si TFT's on stainless steel substrates and identifies some critical issues involved in poly-Si processing on stainless steel. This will enable the fabrication of arrays with integrated drivers on a cheap, flexible and durable substrate for various display [1] and other large area array microelectronic applications.

引用

页码：70 / 72

页数：3

共 9 条

[1]

DAWSON RMA, 1999, SID S, V30, P438

[2] LARGE GRAIN POLYCRYSTALLINE SILICON BY LOW-TEMPERATURE ANNEALING OF LOW-PRESSURE CHEMICAL VAPOR-DEPOSITED AMORPHOUS-SILICON FILMS [J].