Design and implementation of a fast digital fuzzy logic controller using FPGA technology

被引:42
作者
Deliparaschos, K. M. [1 ]
Nenedakis, F. I. [1 ]
Tzafestas, S. G. [1 ]
机构
[1] Natl Tech Univ Athens, Intelligent Robot & Automat Lab, Sch Elect & Comp Engn, GR-15773 Zografos, Greece
关键词
digital fuzzy logic controller; odd-even method; register transfer level; very high-speed hardware description language; place and route; synthesis;
D O I
10.1007/s10846-005-9016-2
中图分类号
TP18 [人工智能理论];
学科分类号
081104 [模式识别与智能系统]; 0812 [计算机科学与技术]; 0835 [软件工程]; 1405 [智能科学与技术];
摘要
Fuzzy logic controllers (FLCs) are finding increasing popularity in real industrial applications, especially when the available system models are inexact or unavailable. This paper proposes a zero-order Takagi-Sugeno parameterized digital FLC, processing only the active rules (rules that give a non-null contribution for a given input data set), at high frequency of operation, without significant increase in hardware complexity. To achieve this goal, an improved method of designing the fuzzy controller model is proposed that significantly reduces the time required to process the active rules and effectively increases the input data processing rate. The digital fuzzy logic controller discussed in this paper achieves an internal core processing speed of at least 200 MHz, featuring two 8-bit inputs and one 12-bit output, with up to seven trapezoidal shape membership functions per input and a rule base of up to 49 rules. The proposed architecture was implemented in a field programmable gate array chip with the use of a very high-speed integrated-circuits hardware description language and advanced synthesis and place and route tools.
引用
收藏
页码:77 / 96
页数:20
相关论文
共 15 条
[1]
A 12b general-purpose fuzzy logic controller chip [J].
Eichfeld, H ;
Kunemund, T ;
Menke, M .
IEEE TRANSACTIONS ON FUZZY SYSTEMS, 1996, 4 (04) :460-475
[2]
A fast digital fuzzy processor [J].
Gabrielli, A ;
Gandolfi, E .
IEEE MICRO, 1999, 19 (01) :68-79
[3]
JIMENEZ CJ, 1994, P INT C FUZZ LOG NEU, P651
[4]
Digital fuzzy logic controller: Design and implementation [J].
Patyra, MJ ;
Grantner, JL ;
Koster, K .
IEEE TRANSACTIONS ON FUZZY SYSTEMS, 1996, 4 (04) :439-459
[5]
Shimizu K., 1992, P 2 INT C FUZZ LOG N, P539
[6]
SJOHOLM S, 1991, VHDL DESIGNERS
[7]
FUZZY IDENTIFICATION OF SYSTEMS AND ITS APPLICATIONS TO MODELING AND CONTROL [J].
TAKAGI, T ;
SUGENO, M .
IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS, 1985, 15 (01) :116-132
[8]
Takagi T., 1983, P IFAC S FUZZ INF KN, P55, DOI [10.1016/S1474-6670(17)62005-6, DOI 10.1016/S1474-6670(17)62005-6]
[9]
A VLSI IMPLEMENTATION OF A FUZZY-INFERENCE ENGINE - TOWARD AN EXPERT SYSTEM ON A CHIP [J].
TOGAI, M ;
WATANABE, H .
INFORMATION SCIENCES, 1986, 38 (02) :147-163
[10]
A VLSI FUZZY-LOGIC CONTROLLER WITH RECONFIGURABLE, CASCADABLE ARCHITECTURE [J].
WATANABE, H ;
DETTLOFF, WD ;
YOUNT, KE .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (02) :376-382