0.4-V logic library friendly SRAM array using rectangular-diffusion cell and delta-boosted-array-voltage scheme

被引：24

作者：

Yamaoka, M ^{[1
]}

Osada, K ^{[1
]}

Ishibashi, K ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, Kokubunji, Tokyo 1858601, Japan

来源：

2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2002年

关键词：

D O I：

10.1109/VLSIC.2002.1015076

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We designed a logic library friendly SRAM array. The array uses rectangular-diffusion cell (RD-cell) and delta-boosted-array-voltage scheme (DBA-scheme). In the RD-cell, the cell ratio is 1.0, and it reduces the imbalance of the cell ratio. A low supply voltage deteriorates the static noise margin, however, the DBA-scheme compensates it. Using the combination of RD-cell and DBA-scheme, a 32-kB test chip achieves 0.4-V operation at 4.5-MHz frequency and 140-muW power dissipation and 0.9-muA standby current.

引用

页码：170 / 173

页数：4

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