Integration of ultrathin resist processes into MPU IC manufacturing flows

被引:11
作者
Cobb, J [1 ]
Conley, W [1 ]
Guenther, T [1 ]
Huang, F [1 ]
Lee, JJ [1 ]
Lii, T [1 ]
Dakshina-Murthy, S [1 ]
Parker, C [1 ]
Usmani, S [1 ]
Wu, W [1 ]
Hector, S [1 ]
机构
[1] Motorola Alliance, AMD, Austin, TX 78721 USA
来源
ADVANCES IN RESIST TECHNOLOGY AND PROCESSING XVIII, PTS 1 AND 2 | 2001年 / 4345卷
关键词
ultrathin resist; UTR; EUV lithography; 157nm lithography; hardmasks; low-k1; imaging;
D O I
10.1117/12.436856
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Extreme ultraviolet lithography (EUVL), and possibly 157-nm lithography, will require thin imaging layers (< 1500 A). The leading EUV resist strategy utilizes thin resists based on materials designed for 248 nm wavelength exposure and hardmasks. This process has produced lines and spaces with reasonable linearity, resolution, photospeed, and line-edge roughness. Although previous work has approached these limits, integration of sub-150nm resists and hardmasks into current IC manufacturing process flows with acceptable defect control has not yet been demonstrated. The authors are investigating ultrathin resist processing for the gate and back end levels and have collected data on coating properties, defect density, etch selectivity., exposure latitude, and depth of focus. Key results include the demonstration of etching 1500 A of poly-Si with a 1200 A thick photoresist etch mask and the demonstration of via chain yield that is comparable to standard thickness resist processes.
引用
收藏
页码:261 / 272
页数:12
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