Parameter-Independent Time-Optimal Digital Control for Point-of-Load Converters

被引:76
作者
Corradini, Luca [1 ]
Costabeber, Alessandro [2 ]
Mattavelli, Paolo [3 ]
Saggini, Stefano [4 ]
机构
[1] Univ Colorado, ECEE Dept, Boulder, CO 80309 USA
[2] Univ Padua, DEI, I-35131 Padua, Italy
[3] Univ Padua, Dept Technol & Management Ind Syst DTG, I-36100 Vicenza, Italy
[4] Univ Udine, DIEGM, I-33100 Udine, Italy
关键词
Asynchronous sampling; dc-dc converters; digital control; point-of-load converters; time-optimal control; TIQ;
D O I
10.1109/TPEL.2009.2022397
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a digital control approach is investigated for time-optimal load step response of dc-dc synchronous buck converters intended for point-of-load (PoL) applications and employing low-equivalent series resistance ceramic output capacitors. Unlike previously reported approaches, the proposed technique is insensitive to converter parametric variations and design uncertainties, as its operation does not rely on the knowledge of the output filter inductance or capacitance. The time-optimal response is achieved through a single ON/OFF switching action undertaken as soon as a load transient is detected. In its most general formulation, the proposed technique automatically incorporates adaptive voltage positioning (AVP) regulation, according to the typical droop design guidelines for powering modern microprocessors. A simpler version, suitable for voltage-mode controlled PoL converters not requiring AVP positioning, is also presented. The technique employs an asynchronous A/D conversion scheme, which quantizes the converter state variables and triggers a nonlinear, event-based digital controller whenever a quantization level transition is detected. Additional sensing requirements are not needed, since the time-optimal transient is achieved through the measurement of the output voltage and, whenever AVP regulation is needed, of the phase currents. Effectiveness and properties of the proposed robust time-optimal approach are validated through both computer simulations and experimental tests on a synchronous buck converter prototype and a VHDL implementation of the control algorithm on an field programmable gate array device.
引用
收藏
页码:2235 / 2248
页数:14
相关论文
共 21 条
[1]   Hybrid Digital Adaptive Control for Synchronous Buck DC-DC Converters [J].
Babazadeh, Amir ;
Maksimovic, Dragan .
2008 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-10, 2008, :1263-1269
[2]  
Biel D, 1996, ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 1, P589, DOI 10.1109/ISCAS.1996.540016
[3]  
Burns W. W. III, 1977, Power Electronics Specialists Conference 1977, P70
[4]  
Capel A, 1996, IEEE POWER ELECTRON, P846, DOI 10.1109/PESC.1996.548680
[5]   Analysis Of A High-Bandwidth Event-Based Digital Controller For DC-DC Converters [J].
Corradini, L. ;
Saggini, S. ;
Mattavelli, P. .
2008 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-10, 2008, :4578-+
[6]   Digital Hysteretic Voltage-Mode Control for DC-DC Converters Based on Asynchronous Sampling [J].
Corradini, Luca ;
Orietti, Enrico ;
Mattavelli, Paolo ;
Saggini, Stefano .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (1-2) :201-211
[7]   Time Optimal, Parameters-insensitive Digital Controller for DC-DC Buck Converters [J].
Costabeber, A. ;
Corradini, L. ;
Mattavelli, P. ;
Saggini, S. .
2008 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-10, 2008, :1243-+
[8]  
Feng G, 2006, IEEE POWER ELECTRON, P100
[9]   A new digital control algorithm to achieve optimal dynamic performance in DC-to-DC converters [J].
Feng, Guang ;
Meyer, Eric ;
Liu, Yan-Fei .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2007, 22 (04) :1489-1498
[10]  
GUPTA P, 2005, P IEEE ISCAS, V4, P3063