Nanoelectronic architecture for Boolean logic

被引:50
作者
Roychowdhury, VP
Janes, DB
Bandyopadhyay, S
机构
[1] PURDUE UNIV, SCH ELECT & COMP ENGN, W LAFAYETTE, IN 47907 USA
[2] UNIV NEBRASKA, DEPT ELECT ENGN, LINCOLN, NE 68588 USA
关键词
D O I
10.1109/5.573742
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A nanoelectronic implementation of Boolean logic circuits is described where logic functionality is realized through charge interactions between metallic dots self-assembled on the surface of a double-barrier resonant tunneling diode (RTD) structure. The primitive computational cell in this architecture consists of a number of dots with nearest neighbor (resistive) interconnections. Specific logic functionality is provided by appropriate rectifying connections between cells. We show how basic logic gates, leading to combinational and sequential circuits, can be realized in this architecture. Additionally, architectural issues including directionality, fault tolerance, and power dissipation are discussed. Estimates based on the current-voltage characteristics of RTD's and the capacitance and resistance values of the interdot connections indicate that static power dissipation as small as 0.1 nW/gate and switching delay as small as a few picoseconds can be expected. We also present a strategy for fabricating/synthesizing such systems using chemical self-organizing/self-assembly phenomena. The proposed synthesis procedure utilizes several chemical self-assembly techniques which have been demonstrated recently, including self-assembly of uniform arrays of close-packed metallic dots with nanometer diameters, controlled resistive linking of nearest neighbor dots with conjugated organic molecules and organic rectifiers.
引用
收藏
页码:574 / 588
页数:15
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