Surface roughness at the Si-SiO2 interfaces in fully depleted silicon-on-insulator inversion layers

The effect of surface roughness scattering on electron transport properties in extremely thin silicon-on-insulator inversion layers is carefully analyzed. It is shown that if the silicon layer is thin enough (thinner than 10 nm) the presence of the buried interface plays a very important role, both by modifying the surface roughness scattering rate due to the gate interface, and by itself providing a non-negligible scattering rate. The usual surface roughness scattering model in bulk silicon inversion layers is shown to overestimate the effect of the surface-roughness scattering due to the gate interface as a consequence of the minimal thickness of the silicon layer. In order to account for this effect, an improved model is provided. The proposed model allows the evaluation of the surface roughness scattering rate due to both the gate interface and the buried interface. Once the scattering rates are evaluated, electron mobility is calculated by the Monte Carlo method. The effect of the buried interface roughness on electron mobility is carefully analyzed by changing the height of the roughness. The effect of the silicon layer thickness on this scattering mechanism is also considered. (C) 1999 American Institute of Physics. [S0021-8979(99)01924-6].