Low-power direct digital frequency synthesis for wireless communications

被引：112

作者：

Bellaouar, A ^{[1
]}

O'brecht, MS ^{[1
]}

Fahim, AM ^{[1
]}

Elmasry, MI ^{[1
]}

机构：

[1] Univ Waterloo, Dept Elect & Comp Engn, VLSI Res Grp, Waterloo, ON N2L 3G1, Canada

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2000年 / 35卷 / 03期

基金：

加拿大自然科学与工程研究理事会;

关键词：

digital circuits; direct digital synthesis (DDS); low-power; wireless communications;

D O I：

10.1109/4.826821

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-power direct digital frequency synthesizer (DDFS) architecture is presented. It uses a smaller lookup table for sine and cosine functions compared to already existing systems with a minimum additional hardware. Only 16 points are stored in the internal memory implemented in ROM (read-only memory). The full computation of the generated sine and cosine is based on the linear interpolation between the sample points. A DDFS with 60-dBc spectral purity, 29-Hz frequency resolution, and 9-bit output data for sine function generation is being implemented in 0.8-mu m CMOS technology. Experimental results verify that the average power dissipation of the DDFS logic is 9.5 mW (at 30 MHz, 3.3 V).

引用

页码：385 / 390

页数：6

共 13 条

[1]

*ALTA GROUP CAD DE, 1995, SPW

[2] A low-power direct digital frequency synthesizer architecture for wireless communications [J].

Bellaouar, A ;

Obrecht, M ;

Fahim, A ;

Elmasry, MI .

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, :593-596

[3]

Bellaouar A., 1999, Low-power direct digital frequency synthesizer architecture, Patent No. [U.S. Patent 5 999 581, 5999581]

[4]

BELLAOUAR A, 1996, LOW POWER DIGITAL AN

[5]

CHANG G, 1994, ISSCC DIG TECH PAP I, V37, P32, DOI 10.1109/ISSCC.1994.344740

[6]

FRIDI AR, 1996, THESIS U WATERLOO WA

[7]

Goldberg B.G., 1996, DIGITAL TECHNIQUES F

[8]

HUTCHISON BH, 1975, FREQUENCY SYNTHESIS

[9]

Nicholas H. T. III, 1988, Proceedings of the 42nd Annual Frequency Control Symposium 1988 (IEEE Cat. No.88CH2588-2), P357, DOI 10.1109/FREQ.1988.27625

[10] A 150-MHZ DIRECT DIGITAL FREQUENCY-SYNTHESIZER IN 1.25-MU-M CMOS WITH - 90-DBC SPURIOUS PERFORMANCE [J].

NICHOLAS, HT ;

SAMUELI, H .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (12) :1959-1969

← 1 2 →