Influences of annealing temperature on characteristics of Ge p-channel metal oxide semiconductor field effect transistors with ZrO2 gate dielectrics

The dependence of gate leakage current and p(+)/n-junction characteristics on annealing temperature is investigated comprehensively in order to obtain good electrical characteristics of Ge p-channel metal oxide semiconductor field effect transistors (p-MOSFETs) with ZrO2 gate dielectrics. The. upper limit of annealing temperature is restricted to 500 degrees C to preserve low gate leakage. Gate leakage current remains low even after Ge incorporation into ZrO2, because ZrO2/Ge gate stacks retain their band alignment to as high as 500 degrees C. The degradation of gate leakage at the high temperature of 700 degrees C is due to the emergence of void regions near the interface in the Ge substrate. On the other hand, the lower limit of the annealing temperature is restricted to 400 degrees C in order to activate dopant boron sufficiently. Good rectifying diode characteristics lead to promising p-MOSFET performance, such as an S-factor of 80 mV/decade. The effective hole mobility of the ZrO2/Ge gate stack without an intentional interfacial layer after annealing at the optimized temperature is as high as 100cm(2)/(V.S).