A new five-parameter MOS transistor mismatch model

被引:16
作者
Serrano-Gotarredona, T [1 ]
Linares-Barranco, B [1 ]
机构
[1] Natl Microelect Ctr, Seville 41012, Spain
关键词
analog circuit modeling; analog circuit simulation; analog VLSI design; mismatch modeling; transistor mismatch; transistor modeling;
D O I
10.1109/55.817445
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new five-parameter MOS transistor mismatch model is introduced capable of predicting transistor mismatch with very high accuracy for ohmic and saturation regions, including short-channel transistors. The new model is based on splitting the contribution of the mobility degradation parameter mismatch ae into two components, and modulating them as the transistor transitions from ohmic to saturation regions. The model is tested for a wide range of transistor sizes (30), and shows excellent precision, never reported before for such a wide range of transistor sizes, including short-channel transistors.
引用
收藏
页码:37 / 39
页数:3
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