The effect of various ArF resist shrinkage amplitude on CD bias

被引:8
作者
Ke, CM [1 ]
Gau, TS [1 ]
Chen, PH [1 ]
Yen, A [1 ]
Lin, BJ [1 ]
机构
[1] Taiwan Semicond Mfg Co, Hsinchu 300, Taiwan
来源
METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XVI, PTS 1 & 2 | 2002年 / 4689卷
关键词
ArF resist shrinkage; ADI; AEI; CD bias; CD SEM; APC;
D O I
10.1117/12.473428
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The beam parameters of CD SEM, accelerating voltage, beam current, measurement time, frame number, and magnification are evaluated to get the optimal setting for reducing the shrinkage of ArF resist. We check image resolution, resist shrinkage amplitude, CD bias between resist line and etched pattern to evaluate the impact of beam parameters. On image resolution, the poly film is better resolved with the 800 V accelerating voltage. On the other hand, 300 V is more suitable for resist image. It also produces much lower resist shrinkage compared with 800 V. Beam current, measurement time, frame number, and magnification produce much less impact on resist shrinkage than the accelerating voltage. On CD bias, we also found that 300 V produces better accuracy and stability compared to 800 V. This is attributed to the lower resist shrinkage. Finally, we suggest an important concept that the optimal beam condition cannot be judged only by precision and resolution but also by the resist shrinkage and CD bias stability.
引用
收藏
页码:997 / 1006
页数:10
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