A Practical Switching Loss Model for Buck Voltage Regulators

被引:126
作者
Eberle, Wilson [1 ]
Zhang, Zhiliang [2 ]
Liu, Yan-Fei [2 ]
Sen, Paresh C. [2 ]
机构
[1] Univ British Columbia, Sch Engn, Kelowna, BC V1V 1V7, Canada
[2] Queens Univ, Dept Elect & Comp Engn, Kingston, ON K7L 3N6, Canada
关键词
DC-DC power conversion; modeling; MOSFETs; RESONANT GATE DRIVER; CONVERTER;
D O I
10.1109/TPEL.2008.2007845
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a review of switching loss mechanisms for synchronous buck voltage regulators (VRs) is presented. Following the review, a new simple and accurate analytical switching loss model is proposed for synchronous buck VRs. The model in cludes the impact of common source inductance and switch parasitic inductances on switching loss. The proposed model uses simple equations to calculate the rise and fall times and piecewise linear approximations of the high-side MOSFET voltage and current waveforms to allow quick and accurate calculation of switching loss in a synchronous buck VR. A simulation program with integrated circuit emphasis (Spice) simulations are used to demonstrate the accuracy of the voltage source driver model operating in a 1-MHz synchronous buck VR at 12-V input, 1.3-V output. Switching loss was estimated with the proposed model and compared to Spice measurements. Experimental results are presented to demonstrate the accuracy of the proposed model.
引用
收藏
页码:700 / 713
页数:14
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