High-performance MRAM technology with an improved magnetic tunnel junction material

被引：14

作者：

Motoyoshi, M ^{[1
]}

Moriyama, K ^{[1
]}

Mori, R ^{[1
]}

Fukumoto, C ^{[1
]}

Itoh, R ^{[1
]}

Kano, R ^{[1
]}

Bessho, K ^{[1
]}

Narisawa, H ^{[1
]}

机构：

[1] Sony Corp, SNC, LSI Technol Dev Div, Yokohama, Kanagawa, Japan

来源：

2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2002年

关键词：

D O I：

10.1109/VLSIT.2002.1015457

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work is a report on high-performance MRAM Technology. 0.4 x 0.8 um(2) MTJ elements were successfully integrated with 0.35 um CMOS technology without process-induced damages. A magnetoresistance (MR) ratio of more than 55% and the read/write operating point were obtained by introducing an improved magnetic tunnel junction (MTJ) material. The short-pulse writing in combination with an improved cell structures suggest that MRAM has a great deal of potential for low power applications.

引用

页码：212 / 213

页数：2