Silicide-induced stress in Si: origin and consequences for MOS technologies

Metal/silicides have been introduced in CMOS technology, some years ago, the main goal being to reduce the sheet resistance of highly doped regions. Research and development has been focussing mainly on minimizing specific resistivity and controlling Si consumption during thin film formation in confined areas. This has lead to a shift from TiSi2 as the most commonly used silicide to CoSi2, which is now the silicide of record in the advanced technologies. Others such as NiSi or silicidation technologies based on the reaction of metal alloys are under investigation. In this review, the silicide technology is approached from a completely different viewing angle. The local growth of metal/silicides gives rise to high stress levels in the neighboring Si. The characterization of silicide-induced stress in the Si due to dense silicide structures is reported based on a systematic study with micro-Raman spectroscopy (muRS), complemented with finite element simulations. The formation of defects in the Si attributed to the stress is demonstrated with transmission electron microscopy (TEM). The effect of the silicide-induced stress is studied through the electrical performance of diodes and transistors. It has been observed that the stress introduced in the Si, adjacent and underneath the silicided regions, impacts the electrical performance of the devices. In this paper, it is explained how the electrical performance is related on the one hand, to the silicide materials properties and on the other hand, to the structure of the transistor, it is implemented in. It is clear that the control of the stress in Si devices, in general, is an important issue for transistor performance and is significantly influenced by the presence of silicided regions. (C) 2002 Published by Elsevier Science B.V.