CMOS stress sensors on (100) silicon

被引:127
作者
Jaeger, RC [1 ]
Suhling, JC
Ramani, R
Bradley, AT
Xu, JP
机构
[1] Auburn Univ, Dept Elect & Comp Engn, Auburn, AL 36849 USA
[2] Auburn Univ, Alabama Microelect Sci & Technol Ctr, Auburn, AL 36849 USA
[3] Auburn Univ, Dept Mech Engn, Auburn, AL 36849 USA
关键词
D O I
10.1109/4.818923
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
CMOS analog stress sensor circuits based upon the piezoresistive behavior of MOSFET's are presented, On the (100) surface, these circuits provide temperature-compensated outputs that are proportional to the in-plane normal stress difference (sigma(11)' - sigma(22)') and the in-plane shear stress sigma(12)'. The circuits provide high sensitivity to stress, well-localized stress-state measurement, and direct voltage or current outputs that eliminate the need for tedious Delta R/R measurements required with more traditional resistor rosettes, The theoretical and experimental results also provide design guidance for calculating and minimizing the sensitivity of traditional analog circuits to packaging-induced die stress.
引用
收藏
页码:85 / 95
页数:11
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