High-performance ultralow-temperature polycrystalline silicon TFT using sequential lateral solidification

被引：23

作者：

Kim, YH ^{[1
]}

Sohn, CY ^{[1
]}

Lim, JW ^{[1
]}

Yun, SJ ^{[1
]}

Hwang, CS ^{[1
]}

Chung, CH ^{[1
]}

Ko, YW ^{[1
]}

Lee, JH ^{[1
]}

机构：

[1] Elect & Telecommun Res Inst, Basic Res Lab, Taejon 305350, South Korea

来源：

IEEE ELECTRON DEVICE LETTERS | 2004年 / 25卷 / 08期

关键词：

flat panel display; polycrystalline Si; thin-film transistor (TFT);

D O I：

10.1109/LED.2004.831578

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This letter presents technologies to fabricate ultralow-temperature (< 150 degreesC) polycrystalline silicon thin-film transistor (ULTPS TFT). Sequential lateral solidification is used for crystallization of RF magnetron sputter deposited amorphous silicon films resulting in a high mobility polycrystalline silicon (poly-Si) film. The gate dielectric is composed of plasma oxidation and Al2O3 grown by plasma-enhanced atomic layer deposition. The breakdown field on the poly-Si film was above 6.3 MV/cm. The fabricated ULTPS TFT showed excellent performance with mobility of 114 cm(2)/V (.) s (nMOS) and 42 cm(2)/V (.) s (pMOS), on/off current ratio of 4.20 x 10(6) (nMOS) and 5.7 x 10(5) (pMOS), small V-th h of 2.6 V (nMOS) and - 3.7 V (pMOS), and swing of 0.73 V/dec (nMOS) and 0.83 V/dec (pMOS).

引用

页码：550 / 552

页数：3

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