Wafer-scale integration of GaAs optoelectronic devices with standard Si integrated circuits using a low-temperature bonding procedure

A methodology for the heterogeneous' integration of epitaxial GaAs wafers with fully processed standard bipolar complementary metal-oxide-semiconductor Si wafers is presented. The complete low-temperature wafer bonding process flow, including procedures for the Si wafer planarization and GaAs substrate removal, has been developed and evaluated. The implementation of an in-plane optical link, consisting of an edge-emitting laser diode, a waveguide and A photodiode, is demonstrated. (C) 2002 American Institute of Physics.