Improved method for the oxide thickness extraction in MOS structures with ultrathin gate dielectrics

被引：30

作者：

Ghibaudo, G ^{[1
]}

Bruyère, S

Devoivre, T

DeSalvo, B

Vincent, E

机构：

[1] ENSERG, CNRS, URA, LPCS, F-38016 Grenoble, France

[2] ST Microelect, F-38921 Crolles, France

来源：

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | 2000年 / 13卷 / 02期

关键词：

extraction method; MOS structure; oxide thickness;

D O I：

10.1109/66.843630

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

An improved method for the assessment of the oxide thickness applicable to advanced CMOS technologies is proposed. To this end, a proper combination of Maserjian's technique and of Vincent's method is used to alleviate the unknown parameter inherent to both extraction procedures and which depends on the employed carrier statistics. The new method has been successfully applied to various technologies with gate oxide thickness ranging from 7 nm to 1.8 nm.

引用

页码：152 / 158

页数：7

共 4 条

[1]

[Anonymous], P IEEE INT C MICR TE

[2] SATURATION CAPACITANCE OF THIN OXIDE MOS STRUCTURES AND EFFECTIVE SURFACE DENSITY OF STATES OF SILICON [J].