Programmable hardware architectures for sensor validation

被引:13
作者
Henry, MP [1 ]
Archer, N [1 ]
Atia, MRA [1 ]
Bowles, J [1 ]
Clarke, DW [1 ]
Fraher, PMA [1 ]
Page, I [1 ]
Randall, G [1 ]
Yang, JCY [1 ]
机构
[1] COMP LAB,OXFORD OX1 3QD,ENGLAND
基金
英国工程与自然科学研究理事会;
关键词
Field-Programmable Gate Analysis (FPGAs); hardware compilation; Handel; occam; transputers; sensor validation; uncertainty; fault detection and diagnosis; fieldbus; thermocouple; dissolved oxygen sensing; Labview;
D O I
10.1016/0967-0661(96)00144-X
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A previous paper (Henry, 1995a) introduced the technique of hardware compilation as the basis for developing highly flexible programmable hardware platforms for control applications such as sensor validation. This paper describes two PC-hosted architectures for sensor validation research. The first holds up to two FPGAs and supports a daughter board with application-specific circuitry. The second is based on the transputer TRAM standard, and consists of programmable hardware modules providing interfacing and low-level signal processing between the transputer and arbitrary I/O components. Three applications are described, based upon a thermocouple, a dissolved oxygen probe and a Coriolis mass flow meter.
引用
收藏
页码:1339 / 1354
页数:16
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