KEYNOTE PAPER - HARDWARE COMPILATION - A NEW TECHNIQUE FOR RAPID PROTOTYPING OF DIGITAL-SYSTEMS APPLIED TO SENSOR VALIDATION

被引：9

作者：

HENRY, MP

机构：

[1] Department of Engineering Science, Oxford, OX1 3PJ, Parks Road

来源：

CONTROL ENGINEERING PRACTICE | 1995年 / 3卷 / 07期

关键词：

FIELD PROGRAMMABLE GATE ARRAYS (FPGAS); HARDWARE COMPILATION; HANDEL; OCCAM; TRANSPUTER; SENSOR VALIDATION; UNCERTAINTY; FAULT DETECTION AND DIAGNOSIS; FIELDBUS;

D O I：

10.1016/0967-0661(95)00074-5

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper provides tutorial introductions to Field-Programmable Gate Arrays (FPGAs) and the concept of hardware compilation - the translation of a high-level programming language directly into a hardware design. As an illustration, a simple stepper motor control program is presented. The research aims of the sensor validation programme are described, and the benefits of using hardware compilation techniques are presented. This leads on in the conclusion of the paper to a more general discussion of the interaction between research and technology, and in particular the influence of information technology upon control engineering.

引用

页码：907 / 924

页数：18

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