Using synchronization to obtain dynamic logic gates

被引:42
作者
Murali, K. [1 ]
Sinha, Sudeshna
机构
[1] Anna Univ, Dept Phys, Madras 600025, Tamil Nadu, India
[2] Inst Math Sci, Madras 600113, Tamil Nadu, India
来源
PHYSICAL REVIEW E | 2007年 / 75卷 / 02期
关键词
D O I
10.1103/PhysRevE.75.025201
中图分类号
O35 [流体力学]; O53 [等离子体物理学];
学科分类号
070204 ; 080103 ; 080704 ;
摘要
We introduce a scheme to obtain key logic-gate structures, using synchronization of nonlinear systems. We demonstrate the idea explicitly by numerics and experiments on nonlinear circuits. A significant feature of this scheme is that a single nonlinear drive-response circuit can be used to flexibly yield the different logic gates, and switch logic behavior by small changes in the parameter of the response system; so the response system can act as a "logic output controller." Thus this scheme may help to construct dynamic general-purpose computational hardware with reconfigurable abilities.
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页数:4
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