Equalization and near-end crosstalk (NEXT) noise cancellation for 20-Gb/s 4-PAM backplane serial I/O interconnections

被引:33
作者
Hur, Y [1 ]
Maeng, M
Chun, C
Bien, F
Kim, H
Chandramouli, S
Gebara, E
Laskar, J
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Georgie Elect Design Ctr, Atlanta, GA 30308 USA
[2] Quellan Inc, Atlanta, GA 30308 USA
[3] Georgia Inst Technol, Mixed Signal Team, Atlanta, GA 30308 USA
关键词
backplane; equalization; finite impulse response (FIR) filter; four-level pulse amplitude modulation (4-PAM); input/output (I/O) interconnection; LC ladder; near-end crosstalk (NEXT) noise cancellation; tunable pole-zero (PZ) filter; 20; Gb/s; 0.18-mu m CMOS;
D O I
10.1109/TMTT.2004.839311
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Limitations in current backplane environments impede high-speed data transmission above 5 Gb/s. In this paper, a system architecture to extend the transmission capacities of legacy backplanes is proposed. The incentives for using a four-level pulse amplitude modulation (4-PAM) scheme are also presented. The architecture is built from feed-forward equalizer and tunable filter elements for near-end crosstalk noise cancellation. Each of the circuits is implemented in a standard 0.18-mum-CMOS process. The building blocks of the architecture, which include an LC ladder, a modified Gilbert-cell multiplier with improved headroom, and a tunable active high-pass filter are described in detail. Results of the architecture are shown demonstrating 20-Gb/s 4-PAM signal transmission.
引用
收藏
页码:246 / 255
页数:10
相关论文
共 14 条
[1]  
BIEN F, 2004, IEEE SIGN PROP INT W
[2]  
HUR Y, 2003, IMAPS ADV TECHN HIGH
[3]  
KIM AJ, 2003, IEEE GAAS INT CIRC S, P193
[4]   A 4-MHZ CMOS CONTINUOUS-TIME FILTER WITH ON-CHIP AUTOMATIC TUNING [J].
KRUMMENACHER, F ;
JOEHL, N .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1988, 23 (03) :750-758
[5]  
Lee T. H., 2003, DESIGN CMOS RADIO FR
[6]  
MAENG M, 2004, IEEE MTT S INT MICR, P105
[7]  
MIJUSKOVIC D, 2003, SMART NETW DEV FOR M
[8]  
NICKEL J, 2003, IMAPS ADV TECHN HIGH
[9]   Shielded differential connector delivers increased bandwidth and signal integrity performance [J].
Ortega, JL ;
Elco, RA .
49TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1999 PROCEEDINGS, 1999, :525-529
[10]   An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-μm CMOS [J].
Stonick, JT ;
Wei, GY ;
Sonntag, JL ;
Weinlader, DK .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (03) :436-443