Stress Liner Effects for 32-nm SOI MOSFETs With HKMG

被引：14

作者：

Cai, Ming ^{[1
]}

Ramani, Karthik ^{[2
]}

Belyansky, Michael ^{[1
]}

Greene, Brian ^{[1
]}

Lee, Doug H. ^{[3
]}

Waidmann, Stephan ^{[4
]}

Tamweber, Frank ^{[1
]}

Henson, William ^{[1
]}

机构：

[1] IBM Semicond Res & Dev Ctr, IBM Syst & Technol Grp, Hopewell Jct, NY 12533 USA

[2] Intermolecular Inc, San Jose, CA 95134 USA

[3] GLOBALFOUNDRIES, Hopewell Jct, NY 12533 USA

[4] GLOBALFOUNDRIES Fab1, D-01109 Dresden, Germany

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2010年 / 57卷 / 07期

关键词：

High-k; metal gate; MOSFETs; strained silicon; stress nitride; CURRENTS; GATE;

D O I：

10.1109/TED.2010.2049076

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Strain effects from stress liners on silicon-on-insulator MOSFETs with high-k dielectric and metal gate (HKMG) are reported. By thoroughly evaluating their impact on drive current, mobility, and threshold voltage, the intrinsic performance gain of stress liners is quantified at the 32-nm node with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous stress liners can reduce gate leakage currents for MOSFETs with HKMG.

引用

页码：1706 / 1709

页数：4

共 16 条

[1]

Auth C., 2008, 2008 Symposium on VLSI Technology, P128, DOI 10.1109/VLSIT.2008.4588589

[2] Methods of producing plasma enhanced chemical vapor deposition silicon nitride thin films with high compressive and tensile stress [J].

Belyansky, M. ;

Chace, M. ;

Gluschenkov, O. ;

Kempisty, J. ;

Klymko, N. ;

Madan, A. ;

Mallikarjunan, A. ;

Molis, S. ;

Ronsheim, P. ;

Wang, Y. ;

Yang, D. ;

Li, Y. .

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A, 2008, 26 (03) :517-521

[3]

Greene B, 2009, 2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P140

[4]

Henson K, 2008, INT EL DEVICES MEET, P645

[5] Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor design [J].

Ito, S ;

Namba, H ;

Yamaguchi, K ;

Hirata, T ;

Ando, K ;

Koyama, S ;

Kuroki, S ;

Ikezawa, N ;

Suzuki, T ;

Saitoh, T ;

Horiuchi, T .

INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :247-250

[6]

Kang C.Y., 2006, IEEE INT ELECT DEVIC, P1

[7]

Leobandung E, 2005, 2005 Symposium on VLSI Technology, Digest of Technical Papers, P126

[8] Comparison of threshold-voltage shifts for uniaxial and biaxial tensile-stressed n-MOSFETs [J].

Lim, JS ;

Thompson, SE ;

Fossum, JG .

IEEE ELECTRON DEVICE LETTERS, 2004, 25 (11) :731-733

[9]

Na MH, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P121, DOI 10.1109/IEDM.2002.1175793

[10]

Narasimha S., 2006, IEDM, P1

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