Dynamic limits of a power-factor preregulator

被引：36

作者：

Fernández, A ^{[1
]}

Sebastián, J ^{[1
]}

Villegas, P ^{[1
]}

Hernando, MM ^{[1
]}

Lamar, DG ^{[1
]}

机构：

[1] Univ Oviedo, Grp Elect Ind, Gijon 33204, Spain

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2005年 / 52卷 / 01期

关键词：

EN; 61000-3-2; regulations; fast dynamics; power-factor correction; resistor emulator; two-stage circuits;

D O I：

10.1109/TIE.2004.841136

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Power-factor correction has been one of the hottest topics during the last few years and, hence, many new circuits have appeared. In general, it is assumed that preregulators; based on multiplier circuits have poor dynamics and, then, a second stage is needed to improve the output voltage dynamic behavior. The other option is the use of single-stage topologies which have fast output voltage regulation although the input current waveform is not sinusoidal. This paper presents an analysis of the dynamic behavior of a conventional power-factor preregulator. The objective is to find the limits of the dynamic characteristics of these circuits when the priority is to improve the output voltage regulation and not the total harmonic distortion or the power factor. A large-signal model is presented and the theoretical results are validated with a prototype.

引用

页码：77 / 87

页数：11

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