The impact of F contamination induced by the process on the gate oxide reliability

被引：7

作者：

Ghidini, G ^{[1
]}

Clementi, C ^{[1
]}

Drera, D ^{[1
]}

Maugain, F ^{[1
]}

机构：

[1] SGS Thomson Microelect, Non Volatile Memory Proc Dev, Cent R&D, I-20041 Agrate Brianza, Italy

来源：

MICROELECTRONICS AND RELIABILITY | 1998年 / 38卷 / 02期

关键词：

D O I：

10.1016/S0026-2714(97)00040-1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The effects of F contaminants introduced by the CVD WSi2 deposition and diffused to the gate oxide interfaces by the thermal treatment performed during the process have been analyzed. High field stresses showed a degradation of the quality of the oxides contaminated by fluorine, but decreasing the stress field below a critical value of 10.5 MV/cm no more effect of fluorine on the gate oxide reliability was detectable. (C) 1998 Elsevier Science Ltd.

引用

页码：255 / 258

页数：4

共 7 条

[1]

CHAPARALA P, 1995, INT REL WORKSH P, P207

[2] TRAP CREATION IN SILICON DIOXIDE PRODUCED BY HOT-ELECTRONS [J].

DIMARIA, DJ ;

STASIAK, JW .

JOURNAL OF APPLIED PHYSICS, 1989, 65 (06) :2342-2356

[3]

DUMIN DJ, 1994, IEEE IRPS, P143

[4] A STUDY OF THE OXIDE GROWN ON WSI2 [J].

GHEZZI, P ;

PIO, F ;

QUEIROLO, G ;

RIVA, C .

SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 1991, 6 (07) :684-689

[5] ON THE CHARGE BUILDUP MECHANISMS IN GATE DIELECTRICS [J].

PAPADAS, C ;

GHIBAUDO, G ;

PIO, F ;

MONSERIE, C ;

PANANAKAKIS, G ;

MORTINI, P ;

RIVA, C .

SOLID-STATE ELECTRONICS, 1994, 37 (03) :495-505

[6]

PRENDERGAST J, 1995, IEEE INT REL PHYS S, P124

[7] THE EFFECT OF FLUORINE IN SILICON DIOXIDE GATE DIELECTRICS [J].

WRIGHT, PJ ;

SARASWAT, KC .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (05) :879-889

← 1 →