Copper metallization for high performance silicon technology

被引:355
作者
Rosenberg, R [1 ]
Edelstein, DC [1 ]
Hu, CK [1 ]
Rodbell, KP [1 ]
机构
[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
来源
ANNUAL REVIEW OF MATERIALS SCIENCE | 2000年 / 30卷
关键词
copper interconnects; microstructure; reliability; electromigration; circuit performance; chip performance; Cu plating process; texture;
D O I
10.1146/annurev.matsci.30.1.229
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The increasingly rapid transition of the electronics industry to high-density, high-performance multifunctional microprocessor Si technology has precipitated migration to new materials alternatives that can satisfy stringent requirements. One of the recent innovations has been the substitution of copper for the standard aluminum-copper metal wiring in order to decrease resistance and tailor RC delay losses in the various hierarchies of the wiring network. This has been accomplished and the product shipped only since the fall of 1998, after more than a decade of intensive development. Critical fabrication innovations include the development of an electroplating process for the copper network, dual-damascence chem-mech polishing (CMP), and effective liner material for copper diffusion barrier and adhesion promotion. The present copper technology provides improved current-carrying capability by higher resistance to electromigration, no device contamination by copper migration, and the performance enhancement analytically predicted. This success of the shift to copper will accelerate the industry movement to finer features and more complex interconnect structures with sufficient device density and connectivity to integrate full systems on chips. The next innovation will be the introduction of low-dielectric constant material that, in combination with copper, will create added excitement as the industry learns how to utilize this new capability.
引用
收藏
页码:229 / 262
页数:34
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