A vertical MOS-gated Esaki tunneling transistor in silicon

被引：83

作者：

Hansch, W ^{[1
]}

Fink, C ^{[1
]}

Schulze, J ^{[1
]}

Eisele, I ^{[1
]}

机构：

[1] Univ Bundeswehr Munchen, Inst Phys, D-85577 Neubiberg, Germany

来源：

THIN SOLID FILMS | 2000年 / 369卷 / 1-2期

关键词：

molecular beam epitaxy; vertical tunneling device; Esaki diode;

D O I：

10.1016/S0040-6090(00)00896-8

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

For the first time a vertical, MOS gated tunneling transistor in silicon is fabricated. The necessary sharp doping profile structure is created by means of MBE. Pronounced transistor action due to Esaki tunneling is demonstrated at room temperature. At a low supply voltage of -0.2 V a current gain of three magnitudes with saturation behaviour is achieved. MOS-gate, low supply voltage and exponential current increase make this device attractive for ULSI applications. (C) 2000 Elsevier Science S.A. All rights reserved.

引用

页码：387 / 389

页数：3

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