The hysteresis caused by interface trap and anomalous positive charge in Al/CeO2-SiO2/silicon capacitors

被引:23
作者
Roh, YH [1 ]
Kim, K
Jung, DG
机构
[1] Sungkyunkwan Univ, Dept Elect Engn, Suwon 440746, South Korea
[2] Sungkyunkwan Univ, Dept Phys, Suwon 440746, South Korea
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS | 1997年 / 36卷 / 12B期
关键词
hysteresis; CeO2; SiO2; capacitance; interface trap; anomalous positive charge;
D O I
10.1143/JJAP.36.L1681
中图分类号
O59 [应用物理学];
学科分类号
摘要
We report the hysteresis induced by two similar defects located at and near the SiO2-Si interface in the Al/CeO2-SiO2/Si capacitor. We find that the hysteresis are generated directly due to the presence of interface trap and anomalous positive charge. Electrical characteristics of the hysteresis are, however, distinct and are strongly dependent on the type of defects. For example, the hysteresis caused by interface traps disappeared after passivating the Si dangling bonds by a post metallization annealing, while only a bias-temperature annealing causes the reduction of the hysteresis generated by anomalous positive charge. We suggest the mechanisms of the hysteresis generation in the Al/CeO2-SiO2/Si capacitor.
引用
收藏
页码:L1681 / L1684
页数:4
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