A 3-V, 0.35-μm CMOS bluetooth receiver IC

被引:56
作者
Sheng, WJ [1 ]
Xia, B [1 ]
Emira, AE [1 ]
Xin, CY [1 ]
Valero-López, AY [1 ]
Moon, ST [1 ]
Sánchez-Sinencio, E [1 ]
机构
[1] Texas A&M Univ, Analog & Mixed Signal Ctr, Dept Elect Engn, College Stn, TX 77843 USA
关键词
active complex filter; CMOS integrated circuits; GFSK demodulator; low-IF receiver; radio receivers;
D O I
10.1109/JSSC.2002.806277
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A fully integrated CMOS low-IF Bluetooth receiver is presented. The receiver consists of a radio frequency (RF) front end, a phase-locked loop (PLL), an active complex filter, a Gaussian frequency shift keying (GFSK) demodulator, and a frequency offset cancellation circuit. The highlights of the receiver include a low-power active complex filter with a nonconventional tuning scheme and a high-performance mixed-mode GFSK demodulator. The chip was fabricated on a 6.25-mm(2) die using TSMC 0.35-mum standard CMOS process. -82 dBm sensitivity at 1e-3 bit error rate, -10 dBm IIP3, and 15 dB noise figure were achieved in the measurements. The receiver active current is about 65 mA from a 3-V power supply.
引用
收藏
页码:30 / 42
页数:13
相关论文
共 15 条
[11]   A 1.6-GHz CMOS PLL with on-chip loop filter [J].
Parker, JF ;
Ray, D .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (03) :337-343
[12]  
Razavi B, 2011, RF Microelectronics, V2nd
[13]   A 1.5-V, 1.5-GHz CMOS low noise amplifier [J].
Shaeffer, DK ;
Lee, TH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (05) :745-759
[14]  
SHENG W, 2002, THESIS TEXAS A M U
[15]   A 2-V CMOS cellular transceiver front-end [J].
Steyaert, MSJ ;
Janssens, J ;
De Muer, B ;
Borremans, M ;
Itoh, N .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (12) :1895-1907