The aim of our effort on epitaxial growth of SiC is to provide layers with high purity and crystal quality for the development of SIC based high voltage devices. It is also an important goal to achieve these results reproducibly and with a cost effective process. The equipment used in our study is an externally purchased vertical cold wall (stainless steel) single wafer reactor. We will report both on experimental and numerical analysis of the flow behavior in this reactor, because a stable flow is a precondition for the reproducibility of an epitaxial process. Further it will be addressed that the process conditions, together with the choice and purity of the wafer holder-susceptor assembly, have a dominating influence on the background impurity level in the epitaxial layers. Results showing an impurity level in the low 10(13) cm(-3)-range in the central regions of the wafers will be presented and the sources for the remaining: impurities will be described. Based on this purity it is principally possible to grow epitaxial layers suited for applications in the 10 kV range if they can be thick enough. We will pre sent results showing that especially for the growth of epitaxial layers exceeding 30 mu m in thickness, the surface pretreatment plays a very important role for the morphology of the epitaxial surface. As a final evaluation of the quality of epitaxial layers grown in our CVD reactor, we will report properties of pn diodes fabricated on these layers. An electrical field strength of 2.8 MV/cm has been determined from the avalanche breakdown characteristics of im planted, edge terminated 1400 V devices. The aim of our effort on epitaxial growth of SiC is to provide layers with high purity and crystal quality for the development of SIC based high voltage devices. It is also an important goal to achieve these results reproducibly and with a cost effective process. The equipment used in our study is an externally purchased vertical cold wall (stainless steel) single wafer reactor. We will report both on experimental and numerical analysis of the flow behavior in this reactor, because a stable flow is a precondition for the reproducibility of an epitaxial process. Further it will be addressed that the process conditions, together with the choice and purity of the wafer holder-susceptor assembly, have a dominating influence on the background impurity level in the epitaxial layers. Results showing an impurity level in the low 10(13) cm(-3)-range in the central regions of the wafers will be presented and the sources for the remaining: impurities will be described. Based on this purity it is principally possible to grow epitaxial layers suited for applications in the 10 kV range if they can be thick enough. We will pre sent results showing that especially for the growth of epitaxial layers exceeding 30 mu m in thickness, the surface pretreatment plays a very important role for the morphology of the epitaxial surface. As a final evaluation of the quality of epitaxial layers grown in our CVD reactor, we will report properties of pn diodes fabricated on these layers. An electrical field strength of 2.8 MV/cm has been determined from the avalanche breakdown characteristics of im planted, edge terminated 1400 V devices. The aim of our effort on epitaxial growth of SiC is to provide layers with high purity and crystal quality for the development of SIC based high voltage devices. It is also an important goal to achieve these results reproducibly and with a cost effective process. The equipment used in our study is an externally purchased vertical cold wall (stainless steel) single wafer reactor. We will report both on experimental and numerical analysis of the flow behavior in this reactor, because a stable flow is a precondition for the reproducibility of an epitaxial process. Further it will be addressed that the process conditions, together with the choice and purity of the wafer holder-susceptor assembly, have a dominating influence on the background impurity level in the epitaxial layers. Results showing an impurity level in the low 10(13) cm(-3)-range in the central regions of the wafers will be presented and the sources for the remaining: impurities will be described. Based on this purity it is principally possible to grow epitaxial layers suited for applications in the 10 kV range if they can be thick enough. We will pre sent results showing that especially for the growth of epitaxial layers exceeding 30 mu m in thickness, the surface pretreatment plays a very important role for the morphology of the epitaxial surface. As a final evaluation of the quality of epitaxial layers grown in our CVD reactor, we will report properties of pn diodes fabricated on these layers. An electrical field strength of 2.8 MV/cm has been determined from the avalanche breakdown characteristics of im planted, edge terminated 1400 V devices. The aim of our effort on epitaxial growth of SiC is to provide layers with high purity and crystal quality for the development of SIC based high voltage devices. It is also an important goal to achieve these results reproducibly and with a cost effective process. The equipment used in our study is an externally purchased vertical cold wall (stainless steel) single wafer reactor. We will report both on experimental and numerical analysis of the flow behavior in this reactor, because a stable flow is a precondition for the reproducibility of an epitaxial process. Further it will be addressed that the process conditions, together with the choice and purity of the wafer holder-susceptor assembly, have a dominating influence on the background impurity level in the epitaxial layers. Results showing an impurity level in the low 10(13) cm(-3)-range in the central regions of the wafers will be presented and the sources for the remaining: impurities will be described. Based on this purity it is principally possible to grow epitaxial layers suited for applications in the 10 kV range if they can be thick enough. We will pre sent results showing that especially for the growth of epitaxial layers exceeding 30 mu m in thickness, the surface pretreatment plays a very important role for the morphology of the epitaxial surface. As a final evaluation of the quality of epitaxial layers grown in our CVD reactor, we will report properties of pn diodes fabricated on these layers. An electrical field strength of 2.8 MV/cm has been determined from the avalanche breakdown characteristics of im planted, edge terminated 1400 V devices. The aim of our effort on epitaxial growth of SiC is to provide layers with high purity and crystal quality for the development of SIC based high voltage devices. It is also an important goal to achieve these results reproducibly and with a cost effective process. The equipment used in our study is an externally purchased vertical cold wall (stainless steel) single wafer reactor. We will report both on experimental and numerical analysis of the flow behavior in this reactor, because a stable flow is a precondition for the reproducibility of an epitaxial process. Further it will be addressed that the process conditions, together with the choice and purity of the wafer holder-susceptor assembly, have a dominating influence on the background impurity level in the epitaxial layers. Results showing an impurity level in the low 10(13) cm(-3)-range in the central regions of the wafers will be presented and the sources for the remaining: impurities will be described. Based on this purity it is principally possible to grow epitaxial layers suited for applications in the 10 kV range if they can be thick enough. We will pre sent results showing that especially for the growth of epitaxial layers exceeding 30 mu m in thickness, the surface pretreatment plays a very important role for the morphology of the epitaxial surface. As a final evaluation of the quality of epitaxial layers grown in our CVD reactor, we will report properties of pn diodes fabricated on these layers. An electrical field strength of 2.8 MV/cm has been determined from the avalanche breakdown characteristics of im planted, edge terminated 1400 V devices.
