Device sizing for minimum energy operation in subthreshold circuits

被引:39
作者
Calhoun, BH [1 ]
Wang, A [1 ]
Chandrakasan, A [1 ]
机构
[1] MIT, Dept Elect Engn, Cambridge, MA 02139 USA
来源
PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2004年
关键词
D O I
10.1109/CICC.2004.1358745
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Digital circuits operating in the subthreshold region provide the minimum energy solution for applications with strict energy constraints. This paper examines the effect of sizing on energy for subthreshold circuits. We show that minimum sized devices are theoretically optimal for reducing energy. A fabricated 0.18mum test chip is used to compare normal sizing and sizing for minimum V-DD. Measurements show that existing standard cell libraries offer a good solution for minimizing energy in subthreshold circuits.
引用
收藏
页码:95 / 98
页数:4
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