Low-power, small-footprint gigabit Ethernet-compatible optical receiver circuit in 0.25μm CMOS

被引：16

作者：

Woodward, TK ^{[1
]}

Krishnamoorthy, AV ^{[1
]}

Rozier, RG ^{[1
]}

Lentine, AL ^{[1
]}

机构：

[1] Bell Labs, Lucent Technol, Holmdel, NJ 07733 USA

来源：

ELECTRONICS LETTERS | 2000年 / 36卷 / 17期

关键词：

D O I：

10.1049/el:20000935

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Experimental results for a gigabit Ethernet-compatible photoreceiver circuit generating CMOS logic level are presented. A single-ended preamplifier is combined with a multi-stage differential postamplifier with inverse scaling to increase bandwidth. Circuits are realised in 0.25 mu m CMOS, dissipating 26mW or less. The analogue portion of the receiver operates at 2 mu A average input current at 1.25Gbit/s, increasing to similar to 10 mu m when CMOS levels are generated. A maximum speed of 2.1Gbit/s is reported for the analogue portion.

引用

收藏

页码：1489 / 1491

页数：3

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