Electrical properties of Y2O3 high-κ gate dielectric on Si(001):: The influence of postmetallization annealing

被引:28
作者
Ioannou-Sougleridis, V [1 ]
Vellianitis, G
Dimoulas, A
机构
[1] Demokritos Natl Ctr Sci Res, Inst Microelect, GR-15310 Athens, Greece
[2] Demokritos Natl Ctr Sci Res, Inst Mat Sci, MBE Lab, GR-15310 Athens, Greece
关键词
D O I
10.1063/1.1558965
中图分类号
O59 [应用物理学];
学科分类号
摘要
In this work we report on the electrical properties of Y2O3 dielectrics grown on silicon (001) substrates at low oxygen background pressure by molecular beam epitaxy. Using metal-insulator-semiconductor capacitors, it is shown that as-grown samples are characterized by a large number of interface states coupled with insulator traps. Annealing in forming gas improves the electrical behavior of the samples, especially those grown at low temperatures, having typical interface state density of the order of 10(12) cm(-2) eV(-1). Overall, the electrical response depends on the structural quality of the interfaces and especially on the presence of a uniform SiOx interfacial layer. The permittivity kappa of the Y2O3 films was found to be rather low (kappasimilar to9), which is attributed mainly to deviations from stoichiometry and the associated generation of oxygen deficiencies in the metal oxide. (C) 2003 American Institute of Physics.
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页码:3982 / 3989
页数:8
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