CHANGES IN THE SIPOS/SI INTERFACE INDUCED BY ANNEALING AT 900-DEGREES-C

The interface regions at heterojunctions between thin films of SIPOS (semi-insulating polycrystalline silicon doped with 51 atomic percent oxygen) and both n- and p-Si substrates have been examined by capacitance-voltage, conductance-voltage and dc current-voltage techniques. Following annealing at 900°C deep depletion is observed in both n- and p-type diodes, although absent in unannealed films of SIPOS. The occurrence of deep depletion is shown to arise from an increase in the electrical conductivity of the SIPOS films created by annealing. Annealing also increases the density of interface states at the Si/SIPOS heterojunction.