Extension of copper plating to 0.13μm nodes by pulse-modulated plating

被引:3
作者
Gandikota, S [1 ]
Duboust, A [1 ]
Neo, S [1 ]
Chen, LY [1 ]
Cheung, R [1 ]
Carl, D [1 ]
机构
[1] Appl Mat Inc, Santa Clara, CA 95054 USA
来源
PROCEEDINGS OF THE IEEE 2000 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2000年
关键词
D O I
10.1109/IITC.2000.854336
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The electro-chemical deposition of copper can carried out by normal DC plating or using pulse plating approach. The superfill for gap fill can be achieved using either of these approaches - DC plating or pulse plating. The pulse plating approach has been observed to show advantages of greater tolerance to seed layer morphology besides controlled planarity, with no major detrimental effects on electrical yield or other film properties.
引用
收藏
页码:239 / 241
页数:3
相关论文
共 4 条
[1]  
ANDRIACOS PC, 1998, 193 M EL SOC SAN DIE
[2]   Damascene copper electroplating for chip interconnections [J].
Andricacos, PC ;
Uzoh, C ;
Dukovic, JO ;
Horkans, J ;
Deligianni, H .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1998, 42 (05) :567-574
[3]  
DENNIS JK, 1990, J APPL CHEM, V220
[4]  
Edelstein D., 1997, P IEEE INT EL DEV M, P773