Ultra low energy arsenic implant limits on sheet resistance and junction depth

被引：11

作者：

Kasnavi, R ^{[1
]}

Griffin, PB ^{[1
]}

Plummer, JD ^{[1
]}

机构：

[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA

来源：

2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2000年

关键词：

D O I：

10.1109/VLSIT.2000.852790

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We have investigated the limits on sheet resistance, junction depth and abruptness using ultra low energy As implants and RTA annealing. We report on anomalous diffusion of 1 keV arsenic implants where the same RTA anneal can result in a deeper junction compared to a 5 keV implant of similar dose. A range of anneal times and temperatures in an RTA from 1020C to 1175C, including spike anneals, have been studied. The effect of junction abruptness in reducing the external resistance of the SID extension for these 5 and 1 keV As implants has been investigated. We show that because of a trade off between junction depth and sheet resistance limits, 1 keV As implants and RTA anneals cannot meet the technology roadmap requirements beyond 2005, though the junction abruptness will meet the requirements till 2011.

引用

页码：112 / 113

页数：2

共 3 条

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