Achieving high encoding efficiency with partial dynamic LFSR reseeding

被引：49

作者：

Krishna, CV ^{[1
]}

Jas, A ^{[1
]}

Touba, NA ^{[1
]}

机构：

[1] Univ Texas, Dept Elect & Comp Engn, Comp Engn Res Ctr, Austin, TX 78712 USA

来源：

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS | 2004年 / 9卷 / 04期

关键词：

design; reliability; built-in self-test; compression; linear finite shift register; reseeding;

D O I：

10.1145/1027084.1027089

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 [计算机科学与技术];

摘要：

Previous forms of LFSR reseeding have been static (i.e., test application is stopped while each seed is loaded) and have required full reseeding (i.e., the length of the seed is equal to the length of the LFSR). A new form of LFSR reseeding is described here that is dynamic (i.e., the seed is incrementally modified while test application proceeds) and allows partial reseeding (i.e. length of the seed is less than that of the LFSR). In addition to providing better encoding efficiency, partial dynamic LFSR reseeding has a simpler hardware implementation than previous schemes based on multiple-polynomial LFSRs.

引用

页码：500 / 516

页数：17

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