Supply voltage scaling for temperature insensitive CMOS circuit operation

被引：52

作者：

Bellaouar, A ^{[1
]}

Fridi, A ^{[1
]}

Elmasry, MI ^{[1
]}

Itoh, K ^{[1
]}

机构：

[1] Univ Waterloo, Dept Elect & Comp Engn, Waterloo, ON N2L 3G1, Canada

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1998年 / 45卷 / 03期

关键词：

circuits; CMOS; digital; temperature effects;

D O I：

10.1109/82.664253

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

CMOS supply voltage scaling for temperature independent gate delay is investigated. It is found that the optimum supply voltage which result in temperature insensitive operation is proportional to the threshold voltage. This voltage enables a single battery cell operation. CMOS technologies with 0.35- and 0.25-mu m size features are used as examples in this study.

引用

页码：415 / 417

页数：3